- A Retargetable System-Level DBT Hypervisor
- Unleashing the Power of Learning: An Enhanced Learning-Based Approach for Dynamic Binary Translation
- Acceleration of memory accesses in dynamic binary translation
- Cross-ISA Machine Emulation for Multicores
- Dynamic Binary Modification: Tools, Techniques, and Applications
- Dynamically Translating x86 to LLVM using QEMU
- Efficient and Retargetable SIMD Translation in a Dynamic Binary Translator
- Hermes: A fast cross-ISA binary translator with post-optimization
- Improving Dynamically-Generated Code Performance on Dynamic Binary Translators
- Improving SIMD Parallelism via Dynamic Binary Translation
- libdetox: A Framework for Online Program Transformation
- Optimizing Binary Translation of Dynamically Generated Code
- Optimizing indirect branches in a system-level dynamic binary translator
- Processor-Tracing Guided Region Formation in Dynamic Binary Translation
- Requirements for Fast Binary Translation
- rv8: a high performance RISC-V to x86 binary translator
- Scalable Emulation of Heterogeneous Systems
- 2019 Ph.D. Dissertation; Luca Carloni
- https://academiccommons.columbia.edu/doi/10.7916/d8-a78j-z392
- "in this dissertation we first present a novel machine emulator design based on dynamic binary translation that makes the following improvements over the state of the art: it scales on multicore hosts while remaining memory efficient, correctly handles cross-ISA differences in atomic instruction semantics, leverages the host floating point (FP) unit to speed up FP emulation without sacrificing correctness, and can be efficiently instrumented to---among other possible uses---drive the execution of a full-system, cross-ISA simulator with support for accelerators."
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Last modified 16 December 2024